M64: Managed Timing Engine Module Ordinary Clock
- Small cells, macro-cells (eNodeBs) etc.
- Mobile Backhaul Carrier Ethernet
- Power smart grid time synchronization
- Sensor networks
- Internet of things & Industrial automation precision timing
- Full IEEE 1588 -2008 PTP master or slave clock
- Supports GPS and PTP input
- Support one-step and two-step clock
- Support P2P and E2E modes
- Support multicast and unicast
- Supports 8 slaves @16packets per second
- Support frequency recovery over SyncE
- Low power, small form factor
- Telecom, power and default profiles
- Fully transparent, low latency pass through traffic
- Industry leading algorithms for G.8261 test suite
- Easy integration into host system
- Low power consumption allows POE capability on host system
- Low total cost of ownership
M64 Ordinary Clock Module
High capacity mobile networks and other emerging applications such as smart grid, wireless sensor networks, Internet of Things etc. require precise time and frequency synchronization. These requirements are getting stricter, especially in the next generation 4G LTE infrastructure. Qulsar’s Managed Timing Engine (MTE) Module is a full packet network based synchronization engine, which is custom designed for such "end-point" applications.
A key innovation is that the M64 can be integrated into an existing communication path. This, along with its standard interfaces, low latency, fully-transparent data communications at gigabit speed, makes integration into a host system simple. It operates at low power and is a cost-optimal solution. The M64 series uses industry leading algorithms to extract and deliver highly accurate synchronization performance.
The M64 is an ordinary clock and can run as a master or slave:
- Slave: Uses industry leading algorithms to extract time from a PTP input stream and produces stable frequency and time outputs
- Master: Generates PTP, frequency and phase outputs acting as the master. It is also capable of utilizing multi-sync inputs
The M64 is capable of synchronizing 8 slaves at 16 packets per second or 4 slaves at 32 packets per second.
Design & Integration
The M64 series provides a simple and cost effective option to integrate precision timing by replacing standard generic parts in host systems. The M64 series can also replace the PHY in the host system, supporting line-rate traffic.
For rapid "turnkey" integration, the M64 should be prepackaged in a subsystem (such as a P64 board or a Local Master (Qg 2) sub-system) that can be quickly used as a synchronization "system", enabling a rapid design cycle while allowing for deeper integration at a later time. The first step towards integration is the purchase of an Evaluation & Developer’s Kit that includes all the interface details, licenses and tools necessary for enabling the design effort.
This module is designed for light-weight end applications such as small cells (and femtocells), Carrier Ethernet based mobile backhaul networks, sensor networks; and Intelligent Electronic Devices (IEDs) in smart grid power utility networks.
One of the innovative features of the M64 series is that it can be integrated into an existing communication path. It features a low latency, fully transparent data communication channel at gigabit speed. It also allows for daisy chaining architectures of host systems.
Multi-sync & Algorithms
The M64 series has industry leading algorithms that enable it to extract precise time signals from packets impeded over the network by traffic load, congestion and packet delay variation (PDV). In addition, the M64 series supports SyncE for frequency recovery unaffected by network PDV. The ability to use multiple synchronization inputs is particularly powerful in today’s applications, where a host system may need to be versatile and deployable in multiple environments.
- IEEE 1588-2008 PTP master or slave clock
- Fully compliant to telecom, power and default profiles
- Multi-sync handling support
- Frequency accuracy better than 1ppb under ITU-T G.8261 test conditions 1
- Phase accuracy better than ±1μs accuracy under G.8261 testing conditions 1
- Enhanced synchronization and network performance metrics
- Upstream 1GbE magnetics
- Downstream 1 RGMII port
- Wirespeed low latency pass-through
- Integrated TCP/IP stack
- IPv4 and IPv6 (PTP)
1 ITU-T G.8261 tests conducted at both Qulsar internal labs and 3rd party labs – details available on request and under NDA
Output Synchronization Interfaces
- Wire speed 1GbE pass-through
- Accuracy with GPS as reference better than ±25ns
- Support 8/32/64/128+ slaves
- Support 1 step and 2 step
- Output Sync rate: up to 128 sync packet per second (individually programmable per slave)
- Time alignment, better than ±1 μs on a managed 10-switch GbE network under G.8261 test conditions 2
- Frequency alignment, better than ±10 ppb on a managed switch GbE network under G.8261 test conditions 2
- Supports 1-step and 2-step
- Input sync rate: up to 128 sync packets per second
Input Synchronization Interfaces
PTP: Ethernet (L2) or UDP IPv4/IPv6 (L3)
ToD in: TTL, 4800/9600 bps, via dedicated pin port up to 115200 bps via serial port
- DHCP client
- FTP server
- TELNET server
- SSH server
- Serial terminal
- Remote firmware upgrade
- Command line interface configuration (Telnet, SSH or serial port terminal)
ToD Format (output)
- Freq. out: 5/10/20/25 MHz
- PPS out: up to 2 kHz with 1 μs resolution
- ToD out: TTL 4800/9600 bps on dedicated pin. Up to 115200 bps on serial port
- PTP: Ethernet (L2) or UDP IPv4/IPv6 (L3)
- ASCII (YYYY-MM-DD HH:MM:SS)
- NMEA & China Mobile binary format
- GPIO, Asynchronous serial, SPI RGMII, MDIO, LVTTL Operating Specifications
- Supply: 3.3V, 1.8V, 1.2V +/- 10%
- Operating temperature: -40°C to 85°C
- RoHS compliant
- Low power processor module: 1.1W (typical)
- Package: LCC84
- Size: 29.2x29.2x2.8 mm
- 83-400-00 MTE Module M64 Ordinary Clock 8 slaves @16pps
2 With industry standard PDV profiles of switches and network conditions.
Qulsar may make changes to specifications and product descriptions at any time, without notice.