Packet Network Sync Module M50-34
Multi Time Source Time and Frequency Controller



  • Edge Grandmaster in Telecom Networks
  • GPS + PTP Base Station synchronization
  • Low Power GPS time to PTP converter
  • Power Grid PTP Synchronization server
  • Industrial Automation local time provider for remote I/O devices with multi time source synchronization

Key Features

  • Multi time source synchronization
  • Grandmaster side and slave side modes
  • Full IEEE 1588-2008 ordinary clock implementation
  • Support Defalut, Power and Telecom profiles
  • Configurable Loop control for complex multi-hop and congested networks
  • Based on the Qulsar processor with hardware timestamping
  • Generic 1PPS +ToD time source interface
  • Dual Ethernet interfaces
  • Contains the full network interface up to transformer
  • Configurable oscillator interface for extended holdover
  • Surface Mounted LCC device on a less than 30x30 mm board space
  • Max 630 mW power consumption
  • RoHS compliant.


The new M50 form factor for the Qulsar processor with a Precise Time Protocol (PTP) system on-chip dramatically reduces the cost, power budget and board space for packet based time and frequency synchronization. The module embeds a platform including real-time operating system, flash file system, communication stacks and more. A validated IEEE1588 - 2008 compliant protocol stack is integrated. An advanced loop control manages complex network topologies and loads.

The M50-34 is an optimized design based on the C34 controller fromQulsar . Designers can fit the miniature sub-system containing a complete IEEE 1588-2008 ordinary clock implementation on less than a 30x30 mm board space.
For a slave side application the M50-34 replaces the PHY and adds functionality to replace a local oscillator by providing packet based timing. As Grandmaster it converts high quality clock input information to the packet network as a master clock.

The M50-34 shortens time to market for products requiring IEEE 1588-2008 functionality; it reduces the cost of synchronization while replacing the PHY including peripheral components, but also the local oscillator and the real-time clock. The M50 can be integrated without the need for host programming. If you want to save costs even more, but there is application space on the module to relocate the complete host functionality to the module.

System Features

General Network Interface:

  • 1x Fast Ethernet, 1x RMII ports
  • Integrated TCP/IP stack


  • Hardware Timestamp Engine (TSE)
  • One- and Two-step clock
  • Best Master Clock algorithm
  • Master-slave (full) and slave-only state machines
  • Delay request-response and peer delay mechanisms
  • Asymmetry correction
  • Configurable loop control for adaptation to complex networks
  • Management messages

Interface Data sheet


  • Full- and half-duplex operation at 10/100 Mbit/s
  • up to 18.5 Mbit/s sustained UDP stack throughput
  • Supports 60 Mbit/s data paths

As PTP Master

  • Accuracy: +/-25 ns *)
  • Holdover: tbd
  • Output Sync rate: up to 128 Hz
  • Number of slaves: up to 200 **)

As PTP Slave

  • Supports one-step and two-step masters
  • Input sync rate: up to 128 Hz
  • Accuracy: up to +/-50 ns ***)
  • Holdover: tbd
  • Extended holdover by flexible oscillator interface

Input synchronization interfaces

  • PPS-in: 1 Hz
  • TOD-in: TTL, 4800/9600 bps, via dedicated pin port up to 115200 bps via serial port
  • PTP: over Ethernet or UDP/IPv4 (L2 or L3)

*) deviation from GPS time, depending PPS-input quality

**) with 1 Hz sync and 1 Hz delay request rates

***) depending on master quality and network configuration.

Output synchronization interfaces

  • FREQ-out: 5/10/20/25 MHz
  • PPS-out: up to 2 kHz with 1us resolution
  • TOD-out: TTL, 4800/9600 bps, via dedicated pin port up to 115200 bps via serial port
  • PTP: over Ethernet or UDP/IPv4 (L2 or L3)

ToD Format (both Input and Output)

  • NMEA
  • China Mobile (optional)

Other features

  • DHCP client
  • FTP server
  • TELNET server
  • Serial terminal
  • Remote firmware upgrade
  • Configurable in every aspect via command-line interface (over Telnet or Terminal)

Block Diagram

M50-34 block diagram


The M50-34 requires no on-module programming if inserted as a subsystem to an existing processor. The existing processor can communicate by implementing a set of HMI like commands. A generic use of precise time can then be made by use of the signal presentation on the PPS, ToD and reference frequency port pins on the module.

When inserted in the Ethernet transmission chain, the M50-34 can leverage the components ability to manage the Precise Time Protocol, sharing the same IP address as the local network processor up to 60 Mbit/s. This is done while running the time and synchronization stack for IEEE 1588 up to the standards maximum sync rate 128 per second.

More advanced users can chose the C-programming environment of the Developer IDE software. A top level system API enables programmers to add applications alongside the application for the disciplined clock and make use of the precise time. Even more advanced programmers can add functionality to replace the original local processor. Besides the PTP engine several other API’s, like the POSIX RTOS are available for system programming.

Technical Specifications

Ordering Information


*) In-system power consumption when running 128 sync messages and 64 delay requests per second. The processor uses less than 10% of this and requires no extra cooling.


Qulsar may make changes to specifications and product descriptions at any time, without notice.

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