M88 – Managed Clock Engine (PTP Boundary Clock - IEEE 1588 Master/Slave)
- Mobile Backhaul Carrier Ethernet
- Macro / micro eNodeB and small cells (eNodeBs)
- C-RAN BBU to RRH sync
- Data center switches
- Broadband access - G.fast, xDSL and xPON)
- Broadcast video genlock (SMPTE 2059)
- Easy & rapid integration in host system
- Full clock subsystem, lower design cost
- Excellent phase noise performance
- Low power consumption
- Ultra-low jitter network-synchronized multiple frequency outputs
- Unified full clock solution
- Synchronizes to GNSS, SyncE, BITS, PTP (IEEE-1588 2008).
- Industry-leading IEEE 1588 time & frequency recovery algorithms
- Gateway and boundary clock
- Supports one-step and two-step clock
- Telecom, power & default profiles
- Industry leading algorithm for G.8261
- Meets the requirements of:
- ITU-T G.8261, G.8265, G.8275
- ITU-T G.8273 T-GM, T-BC and T-SC
- ITU-T G.8262 (SyncE) EEC Options 1&2
- ITU-T-G.813 Option 1
- Telcordia GR1244,GR253(Stratum 3/3E)
- Flexible frequency synthesis with multiple outputs
- Scalable to 128 PTP clients
As mobile networks architectures evolve to LTE-Adv and eventually to 5G, demand for more and more precise synchronization is emerging.
These strict requirements are generating a need for equipment all through the network infrastructure to support distribution of precise sync.
The M88 is a full clocking solution that can act as either boundary clock or a gateway clock, 1 PPS and ToD from GNSS receiver, SyncE and / or IEEE 1588 PTP from the network, PTP, phase and frequency as outputs. So in addition to GNSS, a gateway clock can use PTP or any other source of frequency reference such as SyncE, BITS or other frequency inputs (for example: macro sniff).
Multi sync & Algorithms + System features + network interface
The M88 is a clock module that is suitable for wireless backhaul, IP radios, small and macro eNodeBs and datacenter switches. It is ideal for implementing a highly precise clock system for communications equipment.
The M88 module provides PTP functionality (Master, Slave, Gateway or T-BC) together with several other low-jitter timing outputs. Industry-leading algorithms deliver high performance with respect to the ITU-T G.8261 test suite, even with inexpensive oscillators. The M88 can take a GNSS reference signal when available, and can also handle up to 4 frequency inputs.
It has three independent DSPLLs that can be configured for SyncE (PLL), IEEE 1588. The unique design enables precise time adjustments for 1588 clock steering applications and for using a reference input from a TCXO or OCXO.
The M88 makes control, configuration and pre-programming simple with it's easy to use interfaces and programmability.
Technical Performance & Functions
The M88 is a fully managed clock engine for systems implementing network based timing. The M88 includes functions that are necessary for a network clock synchronizer, a IEEE 1588 implementation (either boundary or gateway clock) and a jitter cleaner.
Multi-sync & Algorithms
The M88 combines clock generation, digital oscillator control, input monitoring & management and packet timing (PTP / IEEE 1588) with advanced servo algorithms.This enables the host system to provide multiple low-jitter (low phase noise) clock outputs.
- Assisted Partial Timing Support Clock (APTSC ) G.8273.4
- Telecom Boundary Clock (T-BC) ITU-T G8273.2 1
- Multi-Sync handling support
- Phase accuracy better than ±1µs
- Fractional Frequency Offset better than 1 ppb under ITU-T test conditions1
- 2x RGMII ports
- Integrated TCP/IP stack
- IPv4 and IPv6 (PTP)
1 ITU-T G.8261 & ITU-T G8273.2 tests conducted at both Qulsar internal labs and 3rd party labs – details available on request and under NDA
Timing References (Inputs)
- 5x low-jitter (low phase noise) outputs
- Programmable frequency up to 350 MHz;
- Can be locked to any reference input
- Programmable loop B/W per DSPLL: 1 mHz-4 kHz
- Additional 5/10/20/25 MHz synthonized output
- Time outputs: 1 PPS & ToD (time of day)
- IEEE 1588 (PTP) output (in GM mode)
- may be locked to GNSS, or PTP (in gateway clock mode), or external 1 PPS / ToD
- 1 PPS / ToD
- Alternative PPS
- External oscillator
- 3x frequency inputs
- 2x GbE RGMII signal
- Clock inputs/outputs configurable for LVDS, LVPECL, LVCMOS, HCSL, CML
- Accuracy with GPS as reference better than ±25ns
- Support one step and two step operation
- Message rates up to 128 packets per second
- Multicast and unicasr operation
ToD Format (output)
- DHCPv4 client; FTP server; TELNET server; SSH server; serial terminal
- Remote firmware upgrade
- Command line interface configuration (Telnet, SSH or serial port terminal)
- ASCII, NMEA and China Mobile Binary format
- GPIO, Asynchronous serial, SPI, RGMII and MDIO
- Supply: 3.3V, 1.8V, 1.2V +/- 10%
- Operating temperature: 0degC to 70 degC (-40degC to 85degC optional)
- RoHS compliant
- Low power dissipation: 1.1W (typical)
- Package: LGA-144
- Size: 29.2 mm X 29.2mm
For detailed datasheet and further info please contact firstname.lastname@example.org
Qulsar may make changes to specifications and product descriptions at any time, without notice.